Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs

V. Iyengar, K. Chakrabarty, E.J. Marinissen

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureHoofdstukAcademicpeer review

47 Citaten (Scopus)

Samenvatting

This paper describes an integrated framework for plug-and-play SOC test automation. This framework is based on a new approach for wrapper/TAM co-optimization based on rectangle packing. We first tailor TAM widths to each core's test data needs. We then use rectangle packing to develop an integrated scheduling algorithm that incorporates precedence and power constraints in the test schedule, while allowing the SOC integrator to designate a group of tests as preemptable. Finally, we study the relationship between TAM width and tester data volume to identify an effective TAM width for the SOC. We present experimental results for non-preemptive, preemptive, and power-constrained test scheduling, as well as for effective TAM width identification for an academic benchmark SOC and three industrial SOCs.
Originele taal-2Engels
TitelProceedings 2002 Design Automation Conference
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's685-690
ISBN van geprinte versie1-58113-461-4
DOI's
StatusGepubliceerd - 2002
Extern gepubliceerdJa

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