Transformation-based exploration of data parallel architecture for customizable hardware : a JPEG encoder case study

R. Corvino, E. Diken, A. Gamatié, L. Jozwiak

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

7 Citaten (Scopus)
97 Downloads (Pure)

Samenvatting

In this paper, we present a method for the design of MPSoCs for complex data-intensive applications. This method aims at a blend exploration of the communication, the memory system architecture and the computation resource parallelism. The proposed method is exemplified on a JPEG Encoder case study by describing all the design steps. Our method allows for a JPEG encoder implementation having a throughput increase of 84% and an increase of the achievable FPGA maximum frequency fmax of 64% with an area overhead of 6 with respect to a reference solution. Our method is also assessed with additional explorations of applications from different domains.
Originele taal-2Engels
TitelProceedings of the 15th Euromicro Conference on Digital System Design (DSD'12), 5-8 September 2012, Cesme, Izmir, Turkey
Plaats van productieBrussels
UitgeverijIEEE Computer Society
Pagina's774-781
ISBN van geprinte versie978-1-4673-2498-4
DOI's
StatusGepubliceerd - 2012
Evenement15th Euromicro Conference on Digital System Design (DSD 2012) - Çeşme, Turkije
Duur: 5 sep 20128 sep 2012
Congresnummer: 15
http://www.univ-valenciennes.fr/congres/dsd2012/

Congres

Congres15th Euromicro Conference on Digital System Design (DSD 2012)
Verkorte titelDSD 2012
Land/RegioTurkije
StadÇeşme
Periode5/09/128/09/12
AnderDSD'12
Internet adres

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