Samenvatting
This paper investigates time-interleaved SAR and time-interleaved slope
converters, targeting low-power, low-resolution, high-speed applications. Fundamentally,
these two architectures can be relatively power-efficient as compared to
other architectures. At the same time, complex calibration schemes are not required
thanks to their inherent accuracy. The architectures are examined and compared,
circuit implementations and measurement results are discussed and an outlook to
the future will be given.
Originele taal-2 | Engels |
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Titel | Proceedings of the 21st Workshop on Advances in Analog Circuit Design, AACD 2012, 27-29 March 2012, Valkenburg, The Netherlands |
Plaats van productie | Berlin |
Uitgeverij | Springer |
Pagina's | 1-49 |
Status | Gepubliceerd - 2012 |
Evenement | 21st Workshop on Advances in Analog Circuit Design, AACD 2012 - Valkenburg, Nederland Duur: 27 mrt. 2012 → 29 mrt. 2012 Congresnummer: 21 |
Congres
Congres | 21st Workshop on Advances in Analog Circuit Design, AACD 2012 |
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Land/Regio | Nederland |
Stad | Valkenburg |
Periode | 27/03/12 → 29/03/12 |
Ander | AACD 2012 |