Time-interleaved SAR and slope converters

P.J.A. Harpe, M. Ding, B. Büsze, C. Zhou, K.J.P. Philips, H.W.H. Groot, de

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Samenvatting

This paper investigates time-interleaved SAR and time-interleaved slope converters, targeting low-power, low-resolution, high-speed applications. Fundamentally, these two architectures can be relatively power-efficient as compared to other architectures. At the same time, complex calibration schemes are not required thanks to their inherent accuracy. The architectures are examined and compared, circuit implementations and measurement results are discussed and an outlook to the future will be given.
Originele taal-2Engels
TitelProceedings of the 21st Workshop on Advances in Analog Circuit Design, AACD 2012, 27-29 March 2012, Valkenburg, The Netherlands
Plaats van productieBerlin
UitgeverijSpringer
Pagina's1-49
StatusGepubliceerd - 2012
Evenement21st Workshop on Advances in Analog Circuit Design, AACD 2012 - Valkenburg, Nederland
Duur: 27 mrt. 201229 mrt. 2012
Congresnummer: 21

Congres

Congres21st Workshop on Advances in Analog Circuit Design, AACD 2012
Land/RegioNederland
StadValkenburg
Periode27/03/1229/03/12
AnderAACD 2012

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