Test set improvement using a next-best-test-case algorithm

I.S.M. Jong, de, R. Boumen, J.M. Mortel - Fronczak, van de, J.E. Rooda

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    The development of a new semi-conductor manufacturing system, like the ASML wafer scanner, is mainly driven by time-to-market. The final test phases during the development phase of a wafer scanner can consist of many (100+) test cases. A family of wafer scanners is developed and introduced to spread out the development effort and maintain the time-to-market requirements. Test cases from previous system types in the family are used as the basis for the definition of new test cases. Experts investigate the changes in the system and which additional test cases are required. The quality of the test cases depends on the expert knowledge and this knowledge is not easily transferred to other experts. This paper presents an algorithm that is able to define which test case is most optimal, given a set of test cases. This algorithm uses a simple model of the test cases and the system under test and an information gain based method determine the next-best-test-case. Furthermore, a clustering technique is used to enable the usage of this method in an industrial setting, where large sets of test cases are common. Several cases have been performed using this method to identify where new test cases could be beneficial.
    Originele taal-2Engels
    Plaats van productieEindhoven
    UitgeverijTechnische Universiteit Eindhoven
    Aantal pagina's16
    StatusGepubliceerd - 2007

    Publicatie series

    NaamSE report
    Volume2007-12
    ISSN van geprinte versie1872-1567

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