Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors

J.A.J. Essing; D.M.W. Leenaerts; R. Mahmoudi

doi:10.1109/BCTM.2012.6352636

Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors

J.A.J. Essing, D.M.W. Leenaerts, R. Mahmoudi

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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This paper describes a systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. The verification paradigm is composed out of three complementary procedures: modeling of the intrinsic device(s), collecting measured data at the tips of probes and de-embedding the test fixture from measured data. The procedure is demonstrated for single and multi-device structures at two distinct operating frequencies, namely 900MHz and 30GHz. The verification between the measured and simulated data, reveals an accuracy of 0.3dB and 7% for respectively output power level and efficiency. Based on this verification procedure, a realistic overview of device performance describes in terms of PAE as function of Po over various frequencies and device-sizes, is extracted.

Originele taal-2	Engels
Titel	Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon
Plaats van productie	Piscataway
Uitgeverij	Institute of Electrical and Electronics Engineers
Pagina's	1-4
ISBN van geprinte versie	978-1-4673-3020-6
DOI's	https://doi.org/10.1109/BCTM.2012.6352636
Status	Gepubliceerd - 2012

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Essing, J. A. J., Leenaerts, D. M. W., & Mahmoudi, R. (2012). Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. In Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon (blz. 1-4). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/BCTM.2012.6352636

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title = "Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors",

abstract = "This paper describes a systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. The verification paradigm is composed out of three complementary procedures: modeling of the intrinsic device(s), collecting measured data at the tips of probes and de-embedding the test fixture from measured data. The procedure is demonstrated for single and multi-device structures at two distinct operating frequencies, namely 900MHz and 30GHz. The verification between the measured and simulated data, reveals an accuracy of 0.3dB and 7% for respectively output power level and efficiency. Based on this verification procedure, a realistic overview of device performance describes in terms of PAE as function of Po over various frequencies and device-sizes, is extracted.",

author = "J.A.J. Essing and D.M.W. Leenaerts and R. Mahmoudi",

year = "2012",

doi = "10.1109/BCTM.2012.6352636",

language = "English",

isbn = "978-1-4673-3020-6",

pages = "1--4",

booktitle = "Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Essing, JAJ, Leenaerts, DMW & Mahmoudi, R 2012, Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. in Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon. Institute of Electrical and Electronics Engineers, Piscataway, blz. 1-4. https://doi.org/10.1109/BCTM.2012.6352636

Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. / Essing, J.A.J.; Leenaerts, D.M.W.; Mahmoudi, R.
Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon. Piscataway: Institute of Electrical and Electronics Engineers, 2012. blz. 1-4.

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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N2 - This paper describes a systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. The verification paradigm is composed out of three complementary procedures: modeling of the intrinsic device(s), collecting measured data at the tips of probes and de-embedding the test fixture from measured data. The procedure is demonstrated for single and multi-device structures at two distinct operating frequencies, namely 900MHz and 30GHz. The verification between the measured and simulated data, reveals an accuracy of 0.3dB and 7% for respectively output power level and efficiency. Based on this verification procedure, a realistic overview of device performance describes in terms of PAE as function of Po over various frequencies and device-sizes, is extracted.

AB - This paper describes a systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. The verification paradigm is composed out of three complementary procedures: modeling of the intrinsic device(s), collecting measured data at the tips of probes and de-embedding the test fixture from measured data. The procedure is demonstrated for single and multi-device structures at two distinct operating frequencies, namely 900MHz and 30GHz. The verification between the measured and simulated data, reveals an accuracy of 0.3dB and 7% for respectively output power level and efficiency. Based on this verification procedure, a realistic overview of device performance describes in terms of PAE as function of Po over various frequencies and device-sizes, is extracted.

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DO - 10.1109/BCTM.2012.6352636

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BT - Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon

PB - Institute of Electrical and Electronics Engineers

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Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors

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