This paper describes a systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. The verification paradigm is composed out of three complementary procedures: modeling of the intrinsic device(s), collecting measured data at the tips of probes and de-embedding the test fixture from measured data. The procedure is demonstrated for single and multi-device structures at two distinct operating frequencies, namely 900MHz and 30GHz. The verification between the measured and simulated data, reveals an accuracy of 0.3dB and 7% for respectively output power level and efficiency. Based on this verification procedure, a realistic overview of device performance describes in terms of PAE as function of Po over various frequencies and device-sizes, is extracted.
|Titel||Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon|
|Plaats van productie||Piscataway|
|Uitgeverij||Institute of Electrical and Electronics Engineers|
|ISBN van geprinte versie||978-1-4673-3020-6|
|Status||Gepubliceerd - 2012|
Essing, J. A. J., Leenaerts, D. M. W., & Mahmoudi, R. (2012). Systematic large-signal verification procedure for mm-wave SiGe bipolar transistors. In Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2012), September 30 - October 3, 2012, Portland, Oregon (blz. 1-4). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/BCTM.2012.6352636