Single-Path High-Resolution Digital Pulse Width Modulator (HRDPWM) without SR Latch

High-Resolution Digital Pulse Width Modulators (HRDPWMs) increase duty cycle resolution compared to standard pulse-width modulation, offering fine-grained control that is ideal for high-frequency power converters. By employing advanced digital signal processing and innovative circuit design, HRDPWMs reduce quantization error, thereby improving dynamic range and output quality. This paper presents a single-path HRDPWM using delay primitives. Comparisons between the proposed architecture and other solutions demonstrate the method's effectiveness in terms of linearity, simplicity of implementation, and reduced dependence on Placement and Routing (PAR) algorithms, as well as voltage and temperature variations. The proposed single-path HRDPWM architecture and a conventional dual-path HRDPWM method are implemented and compared on an AMD Artix-7 FPGA.