Scheduling for register file energy minimization in explicit datapath architectures.

D. She, Y. He, B. Mesman, H. Corporaal

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

13 Citaten (Scopus)
2 Downloads (Pure)


In modern processor architectures, the register file (RF) consumes considerable amount of the processor power. It is well known that by allowing software to have explicit fine-grained control over the datapath, the transport-triggered architectures (TTAs) can substantially reduce the RF traffic, thereby minimizing the RF energy. However, it is important to make sure that the gain in RF is not cancelled out by the overhead due to the fine-grained datapath control, in particular, the deterioration of code density in conventional TTAs. In this paper, we analyze the potential of minimizing RF energy in MOVE-Pro, a TTA-based processor framework. We present a flexible compiler backend, which performs energy-aware instruction scheduling to push the limit of RF energy reduction. The experimental results show that with the proposed energy-aware compiler backend, MOVE-Pro is able to significantly reduce RF energy compared to its RISC/VLIW counterparts, by up to 80%. Meanwhile the code density of MOVE-Pro remains at the same level as its RISC/VLIW counterparts, allowing the energy saving in RF to be successfully transferred to total energy saving.
Originele taal-2Engels
TitelProceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE) 2012, 12-16 March 2012, Dresden, Germany
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
StatusGepubliceerd - 2012
Evenement15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012 - ICC, Dresden, Duitsland
Duur: 12 mrt. 201216 mrt. 2012
Congresnummer: 15


Congres15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012
Verkorte titelDATE 2012
AnderDesign, Automation & Test in Europe 2012, DATE'12
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