Quantization of constrained processor data paths applied to convolutional neural networks

E. de Bruin, Zoran Zivkovic, H. Corporaal

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

4 Citaten (Scopus)
479 Downloads (Pure)

Samenvatting

Artificial Neural Networks (NNs) can effectively be used to solve many classification and regression problems, and deliver state-of-the-art performance in the application domains of natural language processing (NLP) and computer vision (CV). However, the tremendous amount of data movement and excessive convolutional workload of these networks hampers large-scale mobile and embedded productization. Therefore these models are generally mapped to energy-efficient accelerators without floating-point support. Weight and data quantization is an effective way to deploy high-precision models to efficient integer-based platforms. In this paper a quantization method for platforms without wide accumulation registers is being proposed. Two constraints to maximize the bit width of weights and input data for a given accumulator size are introduced. These constraints exploit knowledge about the weight and data distribution of individual layers. Using these constraints, we propose a layer-wise quantization heuristic to find a good fixed-point network approximation. To reduce the number of configurations to consider, only solutions that fully utilize the available accumulator bits are being tested. We demonstrate that 16-bit accumulators are able to obtain a Top-1 classification accuracy within 1% of the floating-point baselines on the CIFAR-10 and ILSVRC2012 image classification benchmarks.

Originele taal-2Engels
TitelProceedings - 21st Euromicro Conference on Digital System Design, DSD 2018
RedacteurenNikos Konofaos, Martin Novotny, Amund Skavhaug
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's357-364
Aantal pagina's8
ISBN van elektronische versie9781538673768
ISBN van geprinte versie978-1-5386-7377-5
DOI's
StatusGepubliceerd - 12 okt. 2018
Evenement21st Euromicro Conference on Digital System Design, DSD 2018 - Prague, Tsjechië
Duur: 29 aug. 201831 aug. 2018
Congresnummer: 21
http://dsd-seaa2018.fit.cvut.cz/dsd/

Congres

Congres21st Euromicro Conference on Digital System Design, DSD 2018
Verkorte titelDSD 2018
Land/RegioTsjechië
StadPrague
Periode29/08/1831/08/18
Internet adres

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  • Brainwave

    Huisken, J. A. (Projectmedewerker), Jiao, H. (Project Manager), Singh, K. (Projectmedewerker), Sánchez Martín, V. (Project Manager), de Bruin, B. (Projectmedewerker), van der Hagen, D. (Project communicatie medewerker) & de Mol-Regels, M. (Project communicatie medewerker)

    1/09/1630/11/21

    Project: Onderzoek direct

  • Wearable Brainwave Processing Platform

    Bergmans, J. W. M. (Project Manager), van der Hagen, D. (Project communicatie medewerker), Sánchez Martín, V. (Program Manager), Corporaal, H. (Projectmedewerker), Pineda de Gyvez, J. (Projectmedewerker) & Huisken, J. A. (Projectmedewerker)

    1/09/1630/11/21

    Project: Onderzoek direct

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