Samenvatting
In IC manufacturing, lithographic scanners expose a circuit pattern onto a semiconductor wafer by means of an optical system. The stage holding the wafer must have a scanning position accuracy of only a few nanometers to support imaging and overlay requirements. In the past 10 years, stage acceleration, position error and settling time have all improved 5-8 times. Compared to lithographic steppers of 25 years ago, the number of controlled stage axes has grown from 3 (analog) to 50 (high-speed digital).
| Originele taal-2 | Engels |
|---|---|
| Titel | Proceedings of the ASPE 2013 Spring Topical Meeting MIT Laboratory for Manufacturing and Productivity Annual Summit, 21-23 April 2013, Cambridge, Massachusetts |
| Plaats van productie | Raleigh |
| Uitgeverij | American Society of Precision Engineering (ASPE) |
| Pagina's | 7-12 |
| Status | Gepubliceerd - 2013 |
| Evenement | ASPE 2013 Spring Topical Meeting MIT Laboratory for Manufacturing and Productivity Annual Summit - Duur: 21 apr. 2013 → 23 apr. 2013 |
Congres
| Congres | ASPE 2013 Spring Topical Meeting MIT Laboratory for Manufacturing and Productivity Annual Summit |
|---|---|
| Periode | 21/04/13 → 23/04/13 |
| Ander | ASPE 2013 Spring Topical Meeting MIT Laboratory for Manufacturing and Productivity Annual Summit |