Parasitic inductive coupling of integrated circuits with their environment

D. Ioan, G. Ciuprina, W.H.A. Schilders

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

1 Citaat (Scopus)
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Samenvatting

This paper describes an original methodology for the modeling of parasitic inductive couplings. The key idea is the use of magnetic hooks which are gates for magnetic fluxes that cross conductive loops and consequently induce parasitic voltages, thus disturbing the signal integrity. The multiple connected domains of integrated circuits are modeled by a Magneto-Electric-Equivalent-Circuit (MEEC), consisting of two mutual coupled circuits, an electric and magnetic one. Magnetic hooks are the externally connected nodes of the magnetic circuit. © 2014 The Institute of Electronics, Information and Communication Engineer. Keywords: Chip; Computational Electromagnetics; IC & Semiconductor EMC; Numerical Modeling; Signal Integrity
Originele taal-2Engels
Titel2014 International Symposium on Electromagnetic CompatibiIity (EMC 2014, Tokyo, Japan, May 12-16, 2014)
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's565-568
ISBN van geprinte versie978-488552287-1
StatusGepubliceerd - 2014
Evenement2014 International Symposium on Electromagnetic CompatibiIity (EMC 2014/Tokyo) - Tokyo, Japan
Duur: 12 mei 201416 mei 2014

Congres

Congres2014 International Symposium on Electromagnetic CompatibiIity (EMC 2014/Tokyo)
Verkorte titelEMC'14/Tokyo
Land/RegioJapan
StadTokyo
Periode12/05/1416/05/14
Ander2014 International Symposium on Electromagnetic CompatibiIity

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