This paper discusses the importance of chip-level EM-simulations required at millimetre wave frequencies for achieving correct results. The negative impact of interconnects on passive structures and the inability of the conventional RC-extraction to cater their effects necessitate alternative solutions. Furthermore during IC-measurements the number of probing points is limited; therefore chip-level simulations can provide insight into circuit behaviour at any point in the circuit. In this work, a non-oscillating 60 GHz transformer coupled I-Q VCO is used as a test-case and it is proved that carrying out EM-simulations for the complete circuit can provide valuable information during the design phase. Sonnet® and Advanced Design Systems® are utilized for EM-simulations and postprocessing functions, respectively.
|Titel||Proceedings of the 2010 European Microwave Integrated Circuits Conference (EuMIC), 27-28 September 2010, Paris, France|
|Plaats van productie||Piscataway|
|Uitgeverij||Institute of Electrical and Electronics Engineers|
|ISBN van geprinte versie||978-1-4244-7231-4|
|Status||Gepubliceerd - 2010|
|Evenement||conference; EuMW2010 - |
Duur: 1 jan 2010 → …
|Periode||1/01/10 → …|
Cheema, H. M., Mahmoudi, R., & Roermund, van, A. H. M. (2010). On the importance of chip-level EM-simulations for 60-GHz CMOS circuits. In Proceedings of the 2010 European Microwave Integrated Circuits Conference (EuMIC), 27-28 September 2010, Paris, France (blz. 246-249). Institute of Electrical and Electronics Engineers.