@inproceedings{1e1952ca66ae42c29a8922a80758cbe7,
title = "On the design of multimedia software and future system architectures",
abstract = "A principal challenge for reducing the cost for designing complex systems-on-chip is to pursue more generic systems for a broad range of products. For this purpose, we explore three new architectural concepts for state-of-art video applications. First, we discuss a reusable scalable hardware architecture employing a hierarchical communication network fitting with the natural hierarchy of the application. In a case study, we show that MPEG streaming in DTV occurs at high level, while subsystems communicate at lower levels. The second concept is a software design that scales over a number of processors to enable reuse over a range of VLSI process technologies. We explore this via an H.264 decoder implementation scaling nearly linearly over up to eight processors by applying data partitioning. The third topic is resource-scalability, which is required to satisfy realtime constraints in a system with a high amount of shared resources. An example complexity-scalable MPEG-2 coder scales the required cycle budget with a factor of three, in parallel with a smooth degradation of quality.",
author = "{With, de}, P.H.N. and Egbert Jaspers",
year = "2004",
doi = "10.1117/12.532564",
language = "English",
isbn = "0-8194-5212-2",
series = "Proceedings of SPIE",
publisher = "SPIE",
pages = "58--69",
editor = "S.I. Sudharsanan and M. Bove and S. Panchanathan",
booktitle = "Electronic Imaging 2004, Embedded Processors for Multimedia and Communications",
address = "United States",
}