Noise analysis of a BJT-based charge pump for low-noise PLL applications

D. Dhar; P.T.M. van Zeijl; D. Milosevic; H. Gao; P.G.M. Baltus

doi:10.1109/ECCTD.2017.8093234

Noise analysis of a BJT-based charge pump for low-noise PLL applications

D. Dhar, P.T.M. van Zeijl, D. Milosevic, H. Gao, P.G.M. Baltus

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

2 Citaten (Scopus)

Samenvatting

Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.

Originele taal-2	Engels
Titel	2017 European Conference on Circuit Theory and Design, ECCTD 2017
Plaats van productie	Piscataway
Uitgeverij	Institute of Electrical and Electronics Engineers
Aantal pagina's	4
ISBN van elektronische versie	978-1-5386-3974-0
DOI's	https://doi.org/10.1109/ECCTD.2017.8093234
Status	Gepubliceerd - 31 okt 2017
Evenement	23rd European Conference on Circuit Theory and Design (ECCTD 2017), September 4-6, 2017, Catania, Italy - Catania, Italië Duur: 4 sep 2017 → 6 sep 2017 http://www.ecctd2017.dieei.unict.it/

Congres

Congres	23rd European Conference on Circuit Theory and Design (ECCTD 2017), September 4-6, 2017, Catania, Italy
Verkorte titel	ECCTD 2017
Land	Italië
Stad	Catania
Periode	4/09/17 → 6/09/17
Internet adres	http://www.ecctd2017.dieei.unict.it/

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10.1109/ECCTD.2017.8093234

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Citeer dit

@inproceedings{205cbe7330ef4af1b1a9dcf5d7a8862b,

title = "Noise analysis of a BJT-based charge pump for low-noise PLL applications",

abstract = "Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.",

keywords = "Charge pump, phase noise, phase-locked loop",

author = "D. Dhar and {van Zeijl}, P.T.M. and D. Milosevic and H. Gao and P.G.M. Baltus",

year = "2017",

month = oct,

day = "31",

doi = "10.1109/ECCTD.2017.8093234",

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booktitle = "2017 European Conference on Circuit Theory and Design, ECCTD 2017",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "23rd European Conference on Circuit Theory and Design (ECCTD 2017), September 4-6, 2017, Catania, Italy, ECCTD 2017 ; Conference date: 04-09-2017 Through 06-09-2017",

url = "http://www.ecctd2017.dieei.unict.it/",

}

Dhar, D , van Zeijl, PTM , Milosevic, D , Gao, H & Baltus, PGM 2017, Noise analysis of a BJT-based charge pump for low-noise PLL applications. in 2017 European Conference on Circuit Theory and Design, ECCTD 2017., 8093234, Institute of Electrical and Electronics Engineers, Piscataway, 23rd European Conference on Circuit Theory and Design (ECCTD 2017), September 4-6, 2017, Catania, Italy, Catania, Italië, 4/09/17. https://doi.org/10.1109/ECCTD.2017.8093234

Noise analysis of a BJT-based charge pump for low-noise PLL applications. / Dhar, D.; van Zeijl, P.T.M.; Milosevic, D.; Gao, H.; Baltus, P.G.M.

2017 European Conference on Circuit Theory and Design, ECCTD 2017. Piscataway : Institute of Electrical and Electronics Engineers, 2017. 8093234.

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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T1 - Noise analysis of a BJT-based charge pump for low-noise PLL applications

AU - Dhar, D.

AU - van Zeijl, P.T.M.

AU - Milosevic, D.

AU - Gao, H.

AU - Baltus, P.G.M.

PY - 2017/10/31

Y1 - 2017/10/31

N2 - Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.

AB - Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.

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KW - phase-locked loop

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