Noise analysis of a BJT-based charge pump for low-noise PLL applications

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

2 Citaten (Scopus)

Samenvatting

Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.
Originele taal-2Engels
Titel2017 European Conference on Circuit Theory and Design, ECCTD 2017
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Aantal pagina's4
ISBN van elektronische versie978-1-5386-3974-0
DOI's
StatusGepubliceerd - 31 okt 2017
Evenement23rd European Conference on Circuit Theory and Design (ECCTD 2017), September 4-6, 2017, Catania, Italy - Catania, Italië
Duur: 4 sep 20176 sep 2017
http://www.ecctd2017.dieei.unict.it/

Congres

Congres23rd European Conference on Circuit Theory and Design (ECCTD 2017), September 4-6, 2017, Catania, Italy
Verkorte titelECCTD 2017
LandItalië
StadCatania
Periode4/09/176/09/17
Internet adres

Vingerafdruk Duik in de onderzoeksthema's van 'Noise analysis of a BJT-based charge pump for low-noise PLL applications'. Samen vormen ze een unieke vingerafdruk.

Citeer dit