NoC-based multiprocessor architecture for mixed-time-criticality applications

K.G.W. Goossens; M.L.P.J. Koedam; A.T. Nelson; S.S. Sinha; S. Goossens; Y. Li; G.D. Breaban; J.R. van Kampenhout; R. Tavakoli Najafabadi; J. Valencia; H. Ahmadi Balef; B. Akesson; S. Stuijk; M.C.W. Geilen; D. Goswami; M. Nabi Najafabadi

doi:10.1007/978-94-017-7267-9_17

NoC-based multiprocessor architecture for mixed-time-criticality applications

K.G.W. Goossens, M.L.P.J. Koedam, A.T. Nelson, S.S. Sinha, S. Goossens, Y. Li, G.D. Breaban, J.R. van Kampenhout, R. Tavakoli Najafabadi, J. Valencia, H. Ahmadi Balef, B. Akesson, S. Stuijk, M.C.W. Geilen, D. Goswami, M. Nabi Najafabadi

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Hoofdstuk › Academic › peer review

14 Citaten (Scopus)

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In this chapter we define what a mixed-time-criticality system is and what its requirements are. After defining the concepts that such systems should follow, we described CompSOC, which is one example of a mixed-time-criticality platform. We describe, in detail, how multiple resources, such as processors, memories, and interconnect, are combined into a larger hardware platform, and especially how they are shared between applications using different arbitration schemes. Following this, the software architecture that transforms the single hardware platform into multiple virtual execution platforms, one per application, is described.

Originele taal-2	Engels
Titel	Handbook of hardware/software codesign
Redacteuren	S. Ha, J. Teich
Plaats van productie	Dordrecht
Uitgeverij	Springer
Pagina's	491-530
Aantal pagina's	40
ISBN van elektronische versie	978-94-017-7267-9
ISBN van geprinte versie	978-94-017-7266-2
DOI's	https://doi.org/10.1007/978-94-017-7267-9_17
Status	Gepubliceerd - 1 nov. 2017

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10.1007/978-94-017-7267-9_17

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Goossens, K. G. W., Koedam, M. L. P. J., Nelson, A. T., Sinha, S. S., Goossens, S., Li, Y., Breaban, G. D., van Kampenhout, J. R., Tavakoli Najafabadi, R., Valencia, J., Ahmadi Balef, H., Akesson, B., Stuijk, S., Geilen, M. C. W., Goswami, D., & Nabi Najafabadi, M. (2017). NoC-based multiprocessor architecture for mixed-time-criticality applications. In S. Ha, & J. Teich (editors), Handbook of hardware/software codesign (blz. 491-530). Springer. https://doi.org/10.1007/978-94-017-7267-9_17

@inbook{48503a02bd294488b75e6dce1e574246,

title = "NoC-based multiprocessor architecture for mixed-time-criticality applications",

abstract = "In this chapter we define what a mixed-time-criticality system is and what its requirements are. After defining the concepts that such systems should follow, we described CompSOC, which is one example of a mixed-time-criticality platform. We describe, in detail, how multiple resources, such as processors, memories, and interconnect, are combined into a larger hardware platform, and especially how they are shared between applications using different arbitration schemes. Following this, the software architecture that transforms the single hardware platform into multiple virtual execution platforms, one per application, is described.",

author = "K.G.W. Goossens and M.L.P.J. Koedam and A.T. Nelson and S.S. Sinha and S. Goossens and Y. Li and G.D. Breaban and {van Kampenhout}, J.R. and {Tavakoli Najafabadi}, R. and J. Valencia and {Ahmadi Balef}, H. and B. Akesson and S. Stuijk and M.C.W. Geilen and D. Goswami and {Nabi Najafabadi}, M.",

year = "2017",

month = nov,

day = "1",

doi = "10.1007/978-94-017-7267-9_17",

language = "English",

isbn = "978-94-017-7266-2",

pages = "491--530",

editor = "S. Ha and J. Teich",

booktitle = "Handbook of hardware/software codesign",

publisher = "Springer",

address = "Germany",

}

Goossens, KGW , Koedam, MLPJ , Nelson, AT, Sinha, SS, Goossens, S, Li, Y, Breaban, GD, van Kampenhout, JR, Tavakoli Najafabadi, R, Valencia, J, Ahmadi Balef, H, Akesson, B, Stuijk, S , Geilen, MCW , Goswami, D & Nabi Najafabadi, M 2017, NoC-based multiprocessor architecture for mixed-time-criticality applications. in S Ha & J Teich (uitgave), Handbook of hardware/software codesign. Springer, Dordrecht, blz. 491-530. https://doi.org/10.1007/978-94-017-7267-9_17

TY - CHAP

T1 - NoC-based multiprocessor architecture for mixed-time-criticality applications

AU - Goossens, K.G.W.

AU - Koedam, M.L.P.J.

AU - Nelson, A.T.

AU - Sinha, S.S.

AU - Goossens, S.

AU - Li, Y.

AU - Breaban, G.D.

AU - van Kampenhout, J.R.

AU - Tavakoli Najafabadi, R.

AU - Valencia, J.

AU - Ahmadi Balef, H.

AU - Akesson, B.

AU - Stuijk, S.

AU - Geilen, M.C.W.

AU - Goswami, D.

AU - Nabi Najafabadi, M.

PY - 2017/11/1

Y1 - 2017/11/1

N2 - In this chapter we define what a mixed-time-criticality system is and what its requirements are. After defining the concepts that such systems should follow, we described CompSOC, which is one example of a mixed-time-criticality platform. We describe, in detail, how multiple resources, such as processors, memories, and interconnect, are combined into a larger hardware platform, and especially how they are shared between applications using different arbitration schemes. Following this, the software architecture that transforms the single hardware platform into multiple virtual execution platforms, one per application, is described.

AB - In this chapter we define what a mixed-time-criticality system is and what its requirements are. After defining the concepts that such systems should follow, we described CompSOC, which is one example of a mixed-time-criticality platform. We describe, in detail, how multiple resources, such as processors, memories, and interconnect, are combined into a larger hardware platform, and especially how they are shared between applications using different arbitration schemes. Following this, the software architecture that transforms the single hardware platform into multiple virtual execution platforms, one per application, is described.

UR - http://www.scopus.com/inward/record.url?scp=85026225032&partnerID=8YFLogxK

U2 - 10.1007/978-94-017-7267-9_17

DO - 10.1007/978-94-017-7267-9_17

M3 - Chapter

AN - SCOPUS:85026225032

SN - 978-94-017-7266-2

SP - 491

EP - 530

BT - Handbook of hardware/software codesign

A2 - Ha, S.

A2 - Teich, J.

PB - Springer

CY - Dordrecht

ER -

NoC-based multiprocessor architecture for mixed-time-criticality applications

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