In this chapterwe described the main principles in designing the networking and transport layers of NoCs. These layers include the specification of the following NoC characteristics: switching technique, topology, addressing and routing, and end-to-end congestion and flow control schemes. We presented this complex problem as a constrained optimization process. The NoC designer should minimize the cost of the NoC which is expressed in terms of VLSI area and power consumption added to his overall chip design. The constraints are the level of services (service classes) to be provided for the traffic patterns of the SoC under consideration. Since NoCs
can be designed anew for each SoC implementation, this optimization process is expected to be repeated for each new SoC design, using NoC CAD tools. Following this definition, it is clear that the SoC traffic characteristics strongly impact the NoC characteristics. We therefore classified SoCs
according to how much is known in advance about their functionality, and consequently about their expected module-to-module communication patterns (Fig. 5.1). We reviewed topical state-of-the-art solutions for each of the important NoC characteristics: switching mechanisms, OoS implementations, topological design, routing mechanisms, congestion and flow control techniques.
We showed how the NoC model impacts the choices available, for each of these, as weIl as the relationships and trade-offs between them.
|Titel||Networks on Chips: Technology and Tools|
|Redacteuren||G. Micheli, De, L. Benini|
|Plaats van productie||San Francisco|
|Uitgeverij||Morgan Kaufmann Publishers, Inc.|
|ISBN van geprinte versie||978-0-1237-0521-5|
|Status||Gepubliceerd - 2006|
|Naam||The Morgan Kaufmann Series in Systems on Silicon|