Samenvatting
In FPGA applications in space, implementations are generally protected using radiation-error mitigation techniques such as triple modular redundancy. For high-performance systems, such fault tolerance techniques can prove problematic due to large power overhead. This paper presents a case study on the Digital Receiver System (DRS) in the Netherlands-China Low-frequency Explorer (NCLE), which is implemented using a Xilinx Kintex 7 SRAM FPGA. Estimates for the critical cross-section of the system are presented, as well as estimated fault rates for a five-year mission to the second Earth-Moon Lagrange point. This includes simulations on the expected radiation environment, an analysis on the applicability of the used Xilinx Kintex 7 FPGA in these conditions and an analysis on the feasibility of implementing the DRS with minimal mitigation techniques for this mission. The steps performed during the analysis are described in detail, as to provide a guideline for replicating such an analysis for different space missions.
Originele taal-2 | Engels |
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Titel | Proceedings - 20th Euromicro Conference on Digital System Design, DSD 2017 |
Redacteuren | H. Kubátová , M. Novotný, A. Skavhaug |
Plaats van productie | Piscataway |
Uitgeverij | Institute of Electrical and Electronics Engineers |
Pagina's | 299-306 |
Aantal pagina's | 8 |
ISBN van elektronische versie | 9781538621455 |
ISBN van geprinte versie | 978-1-5386-2147-9 |
DOI's | |
Status | Gepubliceerd - 26 jun. 2017 |
Evenement | 20th Euromicro Conference on Digital System Design (DSD 2017) - Vienna, Oostenrijk Duur: 30 aug. 2017 → 1 sep. 2017 Congresnummer: 20 |
Congres
Congres | 20th Euromicro Conference on Digital System Design (DSD 2017) |
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Verkorte titel | DSD 2017 |
Land/Regio | Oostenrijk |
Stad | Vienna |
Periode | 30/08/17 → 1/09/17 |