Mismatch-Based Timing Errors in Current Steering DACs

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20 Citaten (Scopus)

Samenvatting

Current Steering Digital-to-Analog Converters (CS-DAC) are important ingredients in many high-speed data converters. Various types of timing errors such as mismatch based timing errors limit broad-band performance. A framework of timing errors is presented here and it is used to analyze these errors. The extracted relationship between performance, block requirements and architecture (e.g segmentation) gives insight on design tradeoffs in Nyquist DACs and multi-bit current-based /spl Sigma//spl Delta/ Modulators.
Originele taal-2Engels
Titel2003 International Symposium on Circuits and Systems, 2003. ISCAS '03
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's977-980
Volume1
ISBN van geprinte versie0-7803-7761-3
DOI's
StatusGepubliceerd - 2003

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