Methods and systems for high frequency clock distribution

G.I. Radulov (Uitvinder), P.J. Quinn (Uitvinder)

Onderzoeksoutput: OctrooiOctrooi-publicatie

Samenvatting

In accordance with some embodiments, a method for high frequency clock distribution in a VLSI system includes splitting an original master clock signal into one or more pairs of lower-frequency sub-clocks for a destination in the VLSI system, distributing each lower-frequency sub-clock of the one or more pairs of lower-frequency sub-clocks to a corresponding channel coupled to the destination, and reconstructing a reference master clock signal at the destination from the one or more pairs of lower-frequency sub-clocks, wherein the reconstructed reference master clock signal replicates the original master clock signal.
Originele taal-2Engels
Octrooinummer8564330
StatusGepubliceerd - 22 okt 2013

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