Low voltage comparator for High speed ADC

Hao Gao, P. Baltus, Qiao Meng

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7 Citaten (Scopus)
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Samenvatting

This paper presents a design of a high-speed, low-voltage, low power consumption comparator with S-R latch for High speed ADC. The comparator is the most important part in the Flash ADC, since the speed and the resolution is determined by the comparator. In this paper, we do the analysis of the traditional comparator and propose a better structure combing sense amplifier and symmetric S-R latch, which can run faster and provide more stable output signal than the traditional structure. The comparator is composed of a latch based amplifier and a S-R latch which provides stable output. There are many issues in the design of the comparator, we will discuss those design issues in this paper.

Originele taal-2Engels
TitelConference Proceedings of the International Symposium on Signals, Systems and Electronics
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's126-129
Aantal pagina's4
Volume1
ISBN van geprinte versie9781424463558
DOI's
StatusGepubliceerd - 2010
Evenement2010 International Symposium on Signals, Systems and Electronics (ISSSE 2010), September 17-20, 2010, Nanjing, China - Nanjing, China
Duur: 17 sep 201020 sep 2010

Congres

Congres2010 International Symposium on Signals, Systems and Electronics (ISSSE 2010), September 17-20, 2010, Nanjing, China
LandChina
StadNanjing
Periode17/09/1020/09/10

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Citeer dit

Gao, H., Baltus, P., & Meng, Q. (2010). Low voltage comparator for High speed ADC. In Conference Proceedings of the International Symposium on Signals, Systems and Electronics (Vol. 1, blz. 126-129). [5607121] Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISSSE.2010.5607121