Implementation of mutual exclusion in VHDL

M.V. Boersma, L.P.M. Benders, M.P.J. Stevens

    Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

    132 Downloads (Pure)

    Samenvatting

    In VHDL it is difficult to implement mutual exclusion at an abstract level since atomic actions are required. A local status model and an arbiter model are presented to achieve mutual exclusion in VHDL. Shared data, protected by a mutual exclusion mechanism, cannot be modelled as a simple, resolved VHDL signal since no resolution function is able to return the correct value. By changing the signal type to a special record type this problem can be solved, using the arbiter model. The specification language Task Level VHDL (TLVHDL) has been developed to specify communication and synchronization mechanisms at an abstract level. In TLVHDL the abovementioned problems are not encountered. A back end compiler converts the abstract TLVHDL description into a VHDL specification, according to a chosen mutual exclusion model. All modifications are handled by the computer and are of no concern to the designer.
    Originele taal-2Engels
    TitelProc. International Conference on Simulation and Hardware Description Languages, 1994 Western Multiconference
    RedacteurenP.A. Wilsey, D. Rhodes
    UitgeverijSimulation Councils, Inc.
    Pagina's57-62
    ISBN van geprinte versie1-56555-070-6
    StatusGepubliceerd - 1994
    Evenementconference; Proc. International Conference on Simulation and Hardware Description Languages, 1994 Western Multiconference, Tempe, AZ, 24-26 January 1994 -
    Duur: 1 jan. 1994 → …

    Congres

    Congresconference; Proc. International Conference on Simulation and Hardware Description Languages, 1994 Western Multiconference, Tempe, AZ, 24-26 January 1994
    Periode1/01/94 → …
    AnderProc. International Conference on Simulation and Hardware Description Languages, 1994 Western Multiconference, Tempe, AZ, 24-26 January 1994

    Vingerafdruk

    Duik in de onderzoeksthema's van 'Implementation of mutual exclusion in VHDL'. Samen vormen ze een unieke vingerafdruk.

    Citeer dit