Implementation of a feed-forward artificial neural network in VHDL on FPGA

Describing an Artificial Neural Network (ANN) using VHDL allows a further implementation of such a system on FPGA. Indeed, the principal point of using FPGA for ANNs is flexibility that gives it an advantage toward other systems like ASICS which are entirely dedicated to one unique architecture and allowance to parallel programming, which is inherent to ANN calculation system and one of their advantages. Usually FPGAs do not have unlimited logical resources integrated in a single package and this limitation forcesrequirement for optimizations for the design in order to have the best efficiency in terms of speed and resource consumption. This paper deals with the VHDL designing problems which can be encountered when trying to describe and implement such ANNs on FPGAs.