Higher-order DWA in bandpass delta-sigma modulators and its implementation

Jingjing Hu, J.A. Hegt, A.H.M. van Roermund, Sotir F. Ouzounov

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

1 Citaat (Scopus)

Samenvatting

This paper proposes a simple implementation of a higher-order data weighted averaging algorithm to spectrally shape mismatch errors of a multi-bit D/A converter in a bandpass (BP) delta-sigma modulator. The proposed implementation avoids the need for a complex and slow sorting function that is usually associated with a higher-order DWA algorithm. An algorithm based on updating two pointers is used, similar as the widely used first-order DWA algorithm. The implementation is based on a pulse density modulated DAC that is clocked at a 3x higher rate compared to the delta-sigma modulator clock to accurately implement the 1x and 3x weight factors that are required by the algorithm. The implementation can also be used in a generalized bandpass DWA algorithm that can be easily adjusted to tune the noise-shaping characteristic to different center frequencies.

Originele taal-2Engels
TitelISCAS 2016 - IEEE International Symposium on Circuits and Systems
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's73-76
Aantal pagina's4
ISBN van elektronische versie978-1-4799-5341-7
ISBN van geprinte versie978-1-4799-5342-4
DOI's
StatusGepubliceerd - 29 jul 2016
Evenement2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016) - Montreal, Canada
Duur: 22 mei 201625 mei 2016

Congres

Congres2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016)
Verkorte titelISCAS 2016
Land/RegioCanada
StadMontreal
Periode22/05/1625/05/16

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