High-value MOS capacitor arrays in ultradeep trenches in silicon

F. Roozeboom, R. Elfrink, J. Verhoeven, J. Van den Meerakker, F. Holthuysen

Onderzoeksoutput: Bijdrage aan tijdschriftCongresartikelAcademicpeer review

35 Citaten (Scopus)


A fully Si-compatible process has been developed to manufacture 6-inch silicon (100) wafers with patterns of trenches, several hundreds of μm deep with a pitch of a few μm. The hundred-fold enlarged silicon surface is used as a substrate for MOS (Metal-Oxide-Semiconductor) capacitor arrays with a capacitance of 1 nF to 1 μF. The specific capacitance was as high as 100 nF/mm2.

Originele taal-2Engels
Pagina's (van-tot)581-584
Aantal pagina's4
TijdschriftMicroelectronic Engineering
Nummer van het tijdschrift1
StatusGepubliceerd - 1 jan 2000
Extern gepubliceerdJa
Evenement25th International Conference on Micro- and Nano-Engineering - Rome, Italy
Duur: 21 sep 199923 sep 1999


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