High-speed linear digital-to-analog converters

Onderzoeksoutput: Bijdrage aan congresPaper

Samenvatting

The demands for ever higher data rates, overall system cost reduction and improved power efficiency, and the advances of nm IC technologies, are pushing the DA converters to ever higher speeds, in terms of bandwidth and sampling rate. Next to speed, linearity is a big issue, especially for multi-band, multi-standard and multi-mode operation. These demands are particularly acute in wireless communication.
This presentation will discuss the fundamental issues related to speed and linearity in DAs and analyze and classify the dominant implementation issues. Next, and based on that, it will show effective ways to shift the boundaries, thereby focusing on calibration methods and mixer-DAC co-integration. Actual design examples illustrate these concepts.
Originele taal-2Engels
StatusGepubliceerd - 9 feb 2017
Evenement64th IEEE International Solid-State Circuits Conference (ISSCC 2017) - San Francisco, Verenigde Staten van Amerika
Duur: 5 feb 20179 feb 2017
Congresnummer: 61

Congres

Congres64th IEEE International Solid-State Circuits Conference (ISSCC 2017)
Verkorte titelISSCC 2017
LandVerenigde Staten van Amerika
StadSan Francisco
Periode5/02/179/02/17

Trefwoorden

  • DA, digital to analog converters, high speed

Citeer dit

van Roermund, A. H. M., & Radulov, G. I. (2017). High-speed linear digital-to-analog converters. Paper gepresenteerd op 64th IEEE International Solid-State Circuits Conference (ISSCC 2017), San Francisco, Verenigde Staten van Amerika.