Gate-workfunction engineering using poly-(Si,Ge) for high-performance 0.18 μm CMOS technology

Y. V. Ponomarev, C. Salm, J. Schmitz, P. H. Woerlee, P. A. Stolk, D. J. Gravesteijn

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

33 Citaten (Scopus)

Samenvatting

We show that poly-SiGe can be readily integrated as a gate material into an existing CMOS technology to achieve significant increase in the transistor performance. In order to preserve the standard salicidation scheme, a buffer poly-Si layer is introduced in the gate stack. PMOST channel profiles are optimized to account for the change of the gate workfunction. High-performance CMOS 0.18 μm devices are manufactured using p- and n-type poly-Si/Si0.8Ge0.2 gates.

Originele taal-2Engels
Titel1997 International Electron Devices Meeting
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's829-832
Aantal pagina's4
ISBN van geprinte versie0-7803-4100-7
DOI's
StatusGepubliceerd - 1 dec. 1997
Extern gepubliceerdJa
Evenement1997 IEEE International Electron Devices Meeting, IEDM 1997 - Washington, Verenigde Staten van Amerika
Duur: 7 dec. 199710 dec. 1997

Congres

Congres1997 IEEE International Electron Devices Meeting, IEDM 1997
Verkorte titelIEDM 1997
Land/RegioVerenigde Staten van Amerika
StadWashington
Periode7/12/9710/12/97
AnderTechnical Digest IEDM 1997, Washington, DC, 7-10 December 1997

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