Fault tolerant logic by error correcting codes

N.F. Benschop, Richard Kleihorst, R.J. Vleuten, van der, G. Bruin - Muurling, J. Simonis

    Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureHoofdstukAcademic

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    Samenvatting

    A method for error correction in integrated circuit (IC) implementations of Boolean functions is described. Additional logic, implementing error correcting codes known from channel coding, corrects both 'hard' manufacturing errors and 'soft' temporary errors. Experimental results are presented, with code optimization based on a fast algorithm for Boolean symmetry analysis. Apart from the well known majority voting (triplication), Hammin-and Product codes are described, having an implementation overhead much less than for maority voting.
    Originele taal-2Engels
    TitelAssociative Digital Network Theory - An Associative Algebra Approach to Logic, Arithmetic and State Machines
    RedacteurenN.F. Benschop
    Plaats van productieBerlin
    UitgeverijSpringer
    Pagina's83-96
    ISBN van geprinte versie978-1402098284
    StatusGepubliceerd - 2009

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