Imperfections in manufacturing processes may cause unwanted connections (faults) that are added to the nominal, "golden", design of an electronic circuit. By fault simulation we simulate all situations: new connections and each with different values for the newly added element. We also consider "opens" (broken connections). During the transient simulation the solution of a faulty circuit is compared to the golden solution of the fault-free circuit. A strategy is developed to efficiently simulate the faulty solutions until their moment of detection. We fully exploit the hierarchical structure of the circuit in the simulation process to bypass parts of the circuit that appear to be unaffected by the fault. Accurate prediction and efficient solution procedures lead to fast fault simulation in which the golden solution and all faulty solutions are calculated over a same time step. Finally, we store a database with detectable deviations for each fault. If such a detectable output "matches" a measurement result of a product that has been returned because of malfunctioning it helps to identify the subcircuit that may contain the real fault.
Naam | CASA-report |
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Volume | 1506 |
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ISSN van geprinte versie | 0926-4507 |
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