Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS

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This paper presents a design of fully differential low-noise amplifier (LNA) used for 60 GHz low power wireless communication in 65 nm CMOS technology. The proposed LNA consists of an input stage employing capacitive cross-coupling technique and an gain stage using current-reuse techniques. The simulated amplifier achieves both input and output matching better than -15dB, a forward gain of 15 dB, a noise figure of 4.7 dB, an input IP3 of -14dBm and the power consumption is 5 mW. The author also proposed a simple design method based on "black box" approach, which can be used for low power LNA design.
Originele taal-2Engels
Titel23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's1-4
Aantal pagina's4
ISBN van elektronische versie978-1-5090-4361-3
ISBN van geprinte versie978-1-5090-4362-0
DOI's
StatusGepubliceerd - 22 nov 2016

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