Demonstration of wafer scale fabrication of 3D stacked transmitter and receiver modules for optical interconnects

Optical interconnects can offer small footprint, high bandwidth density and high data rates compared with electrical wires. In this paper, we demonstrate how we use lithographic processes to stack and interconnect opto-electronic ICs on top of their electronic counter-parts with metallic interconnects spanning more than 200 µm height difference. This process is demonstrated for a partial wafer including first demonstration of using the same process for the creation of micro lenses on top of optical emitters. We further report on testing of the fabricated 3-D stacked transmitter and receiver ICs and show open eye-patterns for transmitter and receiver ICs as well as high uniformity and no sensitivity penalty for the transmitter ICs when compared to a commercial device. Finally we use thermal simulation to show that with proper heat sinking of the CMOS IC the opto-electronic ICs will operate at a reasonable 40 °C which is well within their operation margin.