Dataflow-based multi-ASIP platform approach for digital control applications

R.M.W. Frijns, A.L.J. Kamp, S. Stuijk, J.P.M. Voeten, M. Bontekoe, K.J.A. Gemei, H. Corporaal

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

2 Citaten (Scopus)


To provide a good balance between the performance and flexibility of future digital control platforms, we propose an FPGA-based heterogeneous multiprocessor approach, in which the platform is composed of processing elements from a set of parameterizable heterogeneous Application-Specific Instruction-set Processors (ASIPs), connected with an hierarchical interconnect. With a case-study treating two different industrial-scale controllers, we show that a platform generated from our template using only a small library of instantiable ASIP types outperforms an optimized 8-core general-purpose implementation by a factor 4.9 on sampling frequency and reduces IO-delay with 37.5%.
Originele taal-2Engels
TitelProceedings 16th Euromicro Conference on Digital Systems Design (DSD 2013), 4-6 September 2013, Santandor, Spain
RedacteurenJ. Silva Matos, F. Leporati
StatusGepubliceerd - 2013
Evenement16th Euromicro Conference on Digital System Design (DSD 2013) - Santander, Spanje
Duur: 4 sep 20136 sep 2013


Congres16th Euromicro Conference on Digital System Design (DSD 2013)
Verkorte titelDSD 2013
AnderDSD 2013
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