DAC correction and flexibility, classification, new methods and designs

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureHoofdstukAcademic

1 Citaat (Scopus)
2 Downloads (Pure)

Samenvatting

This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), with an emphasis on self-calibration. Based on this classification, missing methods are identified. Three new DAC correction methods are proposed that can fill in these gaps: high-level mapping, suppression of HD, and calibration of binary currents. All three of them are based on parallel sub-DACs. The paper also proposes to further exploit the advantages of using such parallel sub-DACs to achieve flexibility. Two test-chip implementations in 250 and 180 nm CMOS validate the proposed concepts.
Originele taal-2Engels
TitelAnalog Circuit Design - Smart Data Converters, Filters on Chip, Multimode Transmitters
RedacteurenA.H.M. Roermund, van, M. Steyaert, H.J. Casier
Plaats van productieDordrecht
UitgeverijSpringer
Pagina's79-105
Aantal pagina's342
ISBN van geprinte versie978-90-481-3082-5
DOI's
StatusGepubliceerd - 2009

    Vingerafdruk

Citeer dit

Radulov, G. I., Quinn, P. J., Hegt, J. A., & Roermund, van, A. H. M. (2009). DAC correction and flexibility, classification, new methods and designs. In A. H. M. Roermund, van, M. Steyaert, & H. J. Casier (editors), Analog Circuit Design - Smart Data Converters, Filters on Chip, Multimode Transmitters (blz. 79-105). Dordrecht: Springer. https://doi.org/10.1007/978-90-481-3083-2_5