Control and design of the fillet batching process in a poultry processing plant

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Samenvatting

In the poultry processing industry demand and supply are still growing in volume and diversity, which requires more processing capacity, flexibility and smarter control. This paper focuses on the fillet batching process. To minimize the giveaway of fixed-weight fillet batching the right choices on layout, buffer sizes, batch sizes and batch allocation policies are of great importance. We develop a simulation model to support such decisions on design and control. The model is used (i) to determine buffer and grader sizes, (ii) to optimize batch allocation in a dedicated layout, (iii) to compare a dedicated to a flexible layout and (iv) to assess the impact of smart allocation policies. In particular we find that significant reductions in giveaway can be achieved by employing so-called index policies in a flexible layout.

Originele taal-2Engels
Titel2017 Winter Simulation Conference, WSC 2017
RedacteurenW.K.V. Chan, A. D'Ambrogio, G. Zacharewicz, N. Mustafee, G. Wainer, E. Page
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's3816-3827
Aantal pagina's12
VolumePart F134102
ISBN van elektronische versie978-1-5386-3428-8
DOI's
StatusGepubliceerd - 28 jun 2017
Evenement2017 Winter Simulation Conference (WSC 2017) - Las Vegas, Verenigde Staten van Amerika
Duur: 3 dec 20176 dec 2017
http://meetings2.informs.org/wordpress/wsc2017/

Congres

Congres2017 Winter Simulation Conference (WSC 2017)
Verkorte titelWSC 2017
LandVerenigde Staten van Amerika
StadLas Vegas
Periode3/12/176/12/17
Internet adres

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Citeer dit

Peeters, K., Martagan, T. G., Adan, I. J. B. F., & Cruysen, P. (2017). Control and design of the fillet batching process in a poultry processing plant. In W. K. V. Chan, A. D'Ambrogio, G. Zacharewicz, N. Mustafee, G. Wainer, & E. Page (editors), 2017 Winter Simulation Conference, WSC 2017 (Vol. Part F134102, blz. 3816-3827). [08248093] Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/WSC.2017.8248093