Concurrent L- and S-band class e-power amplifier in 65nm CMOS

R. Zhang, M. Acar, M. Apostolidou, M.P. Heijden, van der, D.M.W. Leenaerts

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

5 Citaten (Scopus)
2 Downloads (Pure)


A 65nm CMOS concurrent dual-band two-stage class-E power amplifier (PA) using high voltage extended-drain devices is presented. To implement sub-optimum class-E load impedance at L-band (1.0-1.3GHz) and S-band (2.8-3.1GHz), a concurrent transmission-line based dual-band output matching network is designed. The measurements show a drain efficiency (¿) >; 61% and a power-added efficiency (PAE) >; 50.5% for L-band (1.0-1.3GHz) with a output power Pout >; 30.4dBm. For S-band (2.8-3.1GHz) a ¿ >; 42.6% and a PAE >; 30% with a Pout >; 28.9dBm are achieved. The output power variations are within 0.8dB and 1.6dB, respectively.
Originele taal-2Engels
TitelProceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
StatusGepubliceerd - 2012


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