Coherent branching feature bisimulation

T. Belder, M.H. Beek, ter, E.P. Vink, de

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

6 Citaten (Scopus)
71 Downloads (Pure)

Samenvatting

Progress in the behavioral analysis of software product lines at the family level benefits from further development of the underlying semantical theory. Here, we propose a behavioral equivalence for feature transition systems (FTS) generalizing branching bisimulation for labeled transition systems (LTS). We prove that branching feature bisimulation for an FTS of a family of products coincides with branching bisimulation for the LTS projection of each the individual products. For a restricted notion of coherent branching feature bisimulation we furthermore present a minimization algorithm and show its correctness. Although the minimization problem for coherent branching feature bisimulation is shown to be intractable, application of the algorithm in the setting of a small case study results in a significant speed-up of model checking of behavioral properties.
Originele taal-2Engels
TitelProceedings 6th Workshop on Formal Methods and Analysis in SPL Engineering (FMSPLE 2015, London, UK, April 11, 2015)
RedacteurenJ.M. Atlee, S. Gnesi
Pagina's14-30
DOI's
StatusGepubliceerd - 2015
Evenement6th Workshop on Formal Methods and Analysis in SPL Engineering (FMSPLE 2015), April 11, 2015, London, UK - London, Verenigd Koninkrijk
Duur: 11 apr 201511 apr 2015
http://fmsple15.isti.cnr.it/

Publicatie series

NaamElectronic Proceedings in Theoretical Computer Science
Volume182
ISSN van geprinte versie2075-2180

Workshop

Workshop6th Workshop on Formal Methods and Analysis in SPL Engineering (FMSPLE 2015), April 11, 2015, London, UK
Verkorte titelFMSPLE 2015
LandVerenigd Koninkrijk
StadLondon
Periode11/04/1511/04/15
Ander6th Workshop on Formal Methods and Analysis in SPL Engineering
Internet adres

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  • Citeer dit

    Belder, T., Beek, ter, M. H., & Vink, de, E. P. (2015). Coherent branching feature bisimulation. In J. M. Atlee, & S. Gnesi (editors), Proceedings 6th Workshop on Formal Methods and Analysis in SPL Engineering (FMSPLE 2015, London, UK, April 11, 2015) (blz. 14-30). (Electronic Proceedings in Theoretical Computer Science; Vol. 182). https://doi.org/10.4204/EPTCS.182.2