Code generation for reconfigurable explicit datapath architectures with LLVM

M. Adriaansen; M. Wijtvliet; R. Jordans; L. Waeijen; H. Corporaal

doi:10.1109/DSD.2016.88

Code generation for reconfigurable explicit datapath architectures with LLVM

M. Adriaansen, M. Wijtvliet, R. Jordans, L. Waeijen, H. Corporaal

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

4 Citaten (Scopus)

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Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.

Originele taal-2	Engels
Titel	2016 Euromicro Conference on Digital System Design (DSD)
Uitgeverij	Institute of Electrical and Electronics Engineers
Pagina's	30-37
Aantal pagina's	8
ISBN van elektronische versie	978-1-5090-2817-7
DOI's	https://doi.org/10.1109/DSD.2016.88
Status	Gepubliceerd - 31 aug. 2016
Evenement	19th Euromicro Conference on Digital System Design (DSD 2016) - Limassol, Cyprus Duur: 31 aug. 2016 → 2 sep. 2016 Congresnummer: 19 http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016

Congres

Congres	19th Euromicro Conference on Digital System Design (DSD 2016)
Verkorte titel	DSD 2016
Land/Regio	Cyprus
Stad	Limassol
Periode	31/08/16 → 2/09/16
Internet adres	http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016

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10.1109/DSD.2016.88

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@inproceedings{80ac3b953e5a4fa688c0b5a1ceac666b,

title = "Code generation for reconfigurable explicit datapath architectures with LLVM",

abstract = "Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.",

keywords = "Code generation, compilation, reconfigurable architectures, CGRA",

author = "M. Adriaansen and M. Wijtvliet and R. Jordans and L. Waeijen and H. Corporaal",

year = "2016",

month = aug,

day = "31",

doi = "10.1109/DSD.2016.88",

language = "English",

pages = "30--37",

booktitle = "2016 Euromicro Conference on Digital System Design (DSD)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "19th Euromicro Conference on Digital System Design (DSD 2016), DSD 2016 ; Conference date: 31-08-2016 Through 02-09-2016",

url = "http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016",

}

Adriaansen, M, Wijtvliet, M , Jordans, R, Waeijen, L & Corporaal, H 2016, Code generation for reconfigurable explicit datapath architectures with LLVM. in 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers, blz. 30-37, 19th Euromicro Conference on Digital System Design (DSD 2016), Limassol, Cyprus, 31/08/16. https://doi.org/10.1109/DSD.2016.88

TY - GEN

T1 - Code generation for reconfigurable explicit datapath architectures with LLVM

AU - Adriaansen, M.

AU - Wijtvliet, M.

AU - Jordans, R.

AU - Waeijen, L.

AU - Corporaal, H.

N1 - Conference code: 19

PY - 2016/8/31

Y1 - 2016/8/31

N2 - Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.

AB - Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.

KW - Code generation

KW - compilation

KW - reconfigurable architectures

KW - CGRA

U2 - 10.1109/DSD.2016.88

DO - 10.1109/DSD.2016.88

M3 - Conference contribution

SP - 30

EP - 37

BT - 2016 Euromicro Conference on Digital System Design (DSD)

PB - Institute of Electrical and Electronics Engineers

T2 - 19th Euromicro Conference on Digital System Design (DSD 2016)

Y2 - 31 August 2016 through 2 September 2016

ER -

Code generation for reconfigurable explicit datapath architectures with LLVM

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