Samenvatting
A task can be preempted by several jobs of higherpriority tasks during its response time. Assuming the worst-casememory demand for each of these jobs leads to pessimistic worst-case response time (WCRT) estimations. Indeed, there is a bigchance that a large portion of the instructions and data associatedwith the preempting task Tj are still available in the cache when Tj releases its next jobs. Accounting for this observation allowsthe pessimism of WCRT analysis to be significantly reduced, which is not considered by existing work. The four main contributions of this paper are: 1) The conceptof persistent cache blocks is introduced in the context of WCRTanalysis, which allows re-use of cache blocks to be captured,2) A cache-persistence-aware WCRT analysis for fixed-prioritypreemptive systems exploiting the PCBs to reduce the WCRTbound, 3) A multi-set extension of the analysis that furtherimproves the WCRT bound and 4) An evaluation showing thatour cache-persistence-aware WCRT analysis results in up to 10%higher schedulability than state-of-the-art approaches.
| Originele taal-2 | Engels |
|---|---|
| Titel | Proceedings - 28th Euromicro Conference on Real-Time Systems, ECRTS 2016 |
| Uitgeverij | Institute of Electrical and Electronics Engineers |
| Pagina's | 262-272 |
| Aantal pagina's | 11 |
| ISBN van elektronische versie | 9781509028115 |
| DOI's | |
| Status | Gepubliceerd - 31 aug. 2016 |
| Extern gepubliceerd | Ja |
| Evenement | 28th Euromicro Conference on Real-Time Systems, ECRTS 2016 - Toulouse, Frankrijk Duur: 5 jul. 2016 → 8 jul. 2016 |
Congres
| Congres | 28th Euromicro Conference on Real-Time Systems, ECRTS 2016 |
|---|---|
| Land/Regio | Frankrijk |
| Stad | Toulouse |
| Periode | 5/07/16 → 8/07/16 |
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