This paper presents the design of highly optimized TTA architectures for image processing applications. An automatic processor design framework as described in  is used. Specialized hardware is used to improve the performance-cost ratio of the processors. An explorer searches the design space for solutions that are good in terms of cost and performance. We show that architectures can be found that efficiently execute very different algorithms at low cost. A hardware feasible architecture is presented that efficiently executes a set of image processing algorithms and performs almost equally or better than alternative, commercial-available solutions do.
|Titel||Euro-PAR, parallel processing : international conference : proceedings, 6th , Munich, Germany, August 29 - September 1, 2000|
|Plaats van productie||Berlin|
|ISBN van geprinte versie||3-540-67956-1|
|Status||Gepubliceerd - 2000|
|Naam||Lecture Notes in Computer Science|
|ISSN van geprinte versie||0302-9743|