TY - JOUR
T1 - ASAM : Automatic architecture synthesis and application mapping
AU - Jozwiak, L.
AU - Lindwer, M.
AU - Corvino, R.
AU - Meloni, P.
AU - Micconi, L.
AU - Madsen, J.
AU - Diken, E.
AU - Gangadharan, D.
AU - Jordans, R.
AU - Pomata, S.
AU - Pop, P.
AU - Tuveri, G.
AU - Raffo, L.
AU - Notarangelo, G.
PY - 2013
Y1 - 2013
N2 - This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems. Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.
Keywords : Embedded systems; Heterogeneous multi-processor system-on-chip (MPSoC);
Customizable ASIPs; Architecture synthesis; MPSoC and ASIP design automation
AB - This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems. Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.
Keywords : Embedded systems; Heterogeneous multi-processor system-on-chip (MPSoC);
Customizable ASIPs; Architecture synthesis; MPSoC and ASIP design automation
U2 - 10.1016/j.micpro.2013.08.006
DO - 10.1016/j.micpro.2013.08.006
M3 - Article
SN - 0141-9331
VL - 37
SP - 1002
EP - 1019
JO - Microprocessors and Microsystems
JF - Microprocessors and Microsystems
IS - 8
ER -