Analog IC having test arrangement and test method for such an IC

A. Zjajo (Uitvinder), H.J. Bergveld (Uitvinder), R.F. Schuttert (Uitvinder), J. Pineda de Gyvez (Uitvinder)

Onderzoeksoutput: OctrooiOctrooi-publicatie

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Samenvatting

An integrated circuit (IC) comprises a plurality of analog stages (10a-c), each of the analog stages being conductively coupled to a power supply (20; 20a-c), and being conductively coupled to each other by a signal path (12); and a test arrangement for testing the plurality of analog stages, the test arrangement comprising input means such as an analog bus (40) coupled to a signal path input of each analog stage from the plurality of analog stages, output means such as a further analog bus (50) for communicating a test result to an output of the integrated circuit, switching means such as a plurality of switches (36) in the biasing infrastructure of the IC for selectively disabling an analog stage, and control means such a shift register (60) for controlling the switching means. Consequently, the analog stages of the IC can be tested and debugged in isolation without the need for switches in the signal path through the cores. A current sensor (70) may be present in the power supply to facilitate structural testing of the analog stages in isolation.
Originele taal-2Engels
OctrooinummerUS7671618
StatusGepubliceerd - 2 mrt 2010

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