Many digital ICs can benefit from sub/near threshold operations that provide ultra-low-energy/operation for long battery lifetime. In addition, sub/near threshold operation largely mitigates the transient current hence lowering the ground bounce noise. This also helps to improve the performance of sensitive analog circuits on the chip, such as delay-lock loops (DLL), which is crucial for the functioning of large digital circuits. However, aggressive voltage scaling causes throughput and reliability degradation. This paper presents SubJPEG, a state of the art multi-standard 65 nm CMOS JPEG encoding coprocessor that enables ultra-wide VDD scaling. With a 0.45 V power supply, it delivers 15 fps 640x480 VGA application with only 1.3 pJ/operation energy consumption per DCT and quantization computation. This co-processor is very suitable for applications such as digital cameras, portable wireless and medical imaging. To the best of our knowledge, this is the largest sub-threshold processor so far.
|Titel||Proceedings of the IEEE International Solid-State Circuits Conference 2009, ISSCC 2009, 8-12 February 2009, San Francisco, CA, USA|
|Plaats van productie||Piscataway|
|Uitgeverij||Institute of Electrical and Electronics Engineers|
|ISBN van geprinte versie||978-1-4244-3458-9|
|Status||Gepubliceerd - 2009|