Samenvatting
Increased power consumption of scaling Complementary Metal Oxide Semiconductor (CMOS) technology and the limitations of binary communication have led to the consideration of non-silicon multiple-valued logic (MVL) circuits. The unique properties of Carbon Nanotube Field Effect Transistors (CNTFETs) in circuit design, such as the capability of setting the desired threshold voltage by adjusting the CNT diameters and the ballistic transport of carriers, make it possible to achieve an effective solution to improve energy efficiency and speed. Quaternary is the closest radix to the optimum (e=2.718) that has the advantage of easy communication with binary logic circuits. This study presents an efficient design of a quaternary serial adder based on CNTFETs. The design exploits an existing high-performance full adder and improves the carry propagation. Simulation results confirm that the proposed quaternary serial adder uses on average 57.8% of the power such an adder requires based on the current state-of-The-Art quaternary full adders.
Originele taal-2 | Engels |
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Titel | Proceedings - 2018 IEEE 48th International Symposium on Multiple-Valued Logic, ISMVL 2018 |
Plaats van productie | Piscataway |
Uitgeverij | IEEE Computer Society |
Pagina's | 44-49 |
Aantal pagina's | 6 |
ISBN van elektronische versie | 9781538644638 |
DOI's | |
Status | Gepubliceerd - 19 jul. 2018 |
Evenement | 48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018 - Linz, Oostenrijk Duur: 16 mei 2018 → 18 mei 2018 |
Congres
Congres | 48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018 |
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Land/Regio | Oostenrijk |
Stad | Linz |
Periode | 16/05/18 → 18/05/18 |