Agile Design-Space Exploration of Dynamic Layer-skipping in Neural Receivers

Dynamic Neural Networks (DyNN) adapt their structure during runtime for improved performance and lower power consumption. DyNNs benefit neural network-based wireless receivers, or in short neural receivers, that adapt their performance under varying channel conditions. However, DyNN architectures are not yet explored sufficiently in the literature as this would require a framework for simultaneously evaluating system-level performance and accurate hardware Power-Performance-Area (PPA) under different dynamic scenarios. This paper presents two main contributions: (1) An automated framework that bridges a system-level performance evaluation model of a wireless system and a High-Level Synthesis (HLS) tool for agile Design-Space Exploration (DSE) of DyNNs. (2) A novel DyNN architecture for neural receivers in wireless systems that skips a variable number of layers according to varying channel conditions. Our proposed neural receiver architecture with layer-skipping for a Single Input Multi Output (SIMO) wireless system when implemented in 22 nm FD-SOI technology shows power consumption savings of up to 59.2% at the cost of 200% increase in area compared to a static network.