Adding synchronous and LSSD modes to asynchronous circuits

F. Beest, te; C.H. Berkel, van; A.M.G. Peeters

doi:10.1109/ASYNC.2002.1000306

Adding synchronous and LSSD modes to asynchronous circuits

F. Beest, te, C.H. Berkel, van, A.M.G. Peeters

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

Originele taal-2	Engels
Titel	Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002)
Plaats van productie	Los Alamitos CA
Uitgeverij	IEEE Computer Society
Pagina's	161-170
ISBN van geprinte versie	0-7695-1540-1
DOI's	https://doi.org/10.1109/ASYNC.2002.1000306
Status	Gepubliceerd - 2002

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10.1109/ASYNC.2002.1000306

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@inproceedings{7a8c5af8b0d342fc8f9faafecf10864c,

title = "Adding synchronous and LSSD modes to asynchronous circuits",

abstract = "A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.",

author = "{Beest, te}, F. and {Berkel, van}, C.H. and A.M.G. Peeters",

year = "2002",

doi = "10.1109/ASYNC.2002.1000306",

language = "English",

isbn = "0-7695-1540-1",

pages = "161--170",

booktitle = "Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002)",

publisher = "IEEE Computer Society",

address = "United States",

}

Adding synchronous and LSSD modes to asynchronous circuits. / Beest, te, F.; Berkel, van, C.H.; Peeters, A.M.G.
Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002). Los Alamitos CA: IEEE Computer Society, 2002. blz. 161-170.

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

TY - GEN

T1 - Adding synchronous and LSSD modes to asynchronous circuits

AU - Beest, te, F.

AU - Berkel, van, C.H.

AU - Peeters, A.M.G.

PY - 2002

Y1 - 2002

N2 - A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

AB - A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

U2 - 10.1109/ASYNC.2002.1000306

DO - 10.1109/ASYNC.2002.1000306

M3 - Conference contribution

SN - 0-7695-1540-1

SP - 161

EP - 170

BT - Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002)

PB - IEEE Computer Society

CY - Los Alamitos CA

ER -

Adding synchronous and LSSD modes to asynchronous circuits

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