A microcontroller with 96% power-conversion efficiency using stacked voltage domains

K. Blutman; A. Kapoor; A. Majumdar; J.G. Martinez; J. Echeverri; L. Sevat; A. Van Der Wel; H. Fatemi; J. Pineda de Gyvez; K. Makinwa

doi:10.1109/VLSIC.2016.7573478

A microcontroller with 96% power-conversion efficiency using stacked voltage domains

K. Blutman, A. Kapoor, A. Majumdar, J.G. Martinez, J. Echeverri, L. Sevat, A. Van Der Wel, H. Fatemi, J. Pineda de Gyvez, K. Makinwa

Electronic Systems

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

Originele taal-2	Engels
Titel	2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii
Uitgeverij	Institute of Electrical and Electronics Engineers
Pagina's	1-2
ISBN van elektronische versie	9781509006342
ISBN van geprinte versie	Piscataway
DOI's	https://doi.org/10.1109/VLSIC.2016.7573478
Status	Gepubliceerd - 21 sep. 2016
Evenement	2016 Symposium on VLSI Circuits (VLSIC 2016) - Honolulu, Verenigde Staten van Amerika Duur: 14 jun. 2016 → 17 jun. 2016 Congresnummer: 30

Congres

Congres	2016 Symposium on VLSI Circuits (VLSIC 2016)
Verkorte titel	VLSIC 2016
Land/Regio	Verenigde Staten van Amerika
Stad	Honolulu
Periode	14/06/16 → 17/06/16

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Blutman, K., Kapoor, A., Majumdar, A., Martinez, J. G., Echeverri, J., Sevat, L., Van Der Wel, A., Fatemi, H., Pineda de Gyvez, J., & Makinwa, K. (2016). A microcontroller with 96% power-conversion efficiency using stacked voltage domains. In 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii (blz. 1-2). [7573478] Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/VLSIC.2016.7573478

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abstract = "This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).",

author = "K. Blutman and A. Kapoor and A. Majumdar and J.G. Martinez and J. Echeverri and L. Sevat and {Van Der Wel}, A. and H. Fatemi and {Pineda de Gyvez}, J. and K. Makinwa",

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Blutman, K, Kapoor, A, Majumdar, A, Martinez, JG, Echeverri, J, Sevat, L, Van Der Wel, A, Fatemi, H, Pineda de Gyvez, J & Makinwa, K 2016, A microcontroller with 96% power-conversion efficiency using stacked voltage domains. in 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii., 7573478, Institute of Electrical and Electronics Engineers, blz. 1-2, 2016 Symposium on VLSI Circuits (VLSIC 2016), Honolulu, Verenigde Staten van Amerika, 14/06/16. https://doi.org/10.1109/VLSIC.2016.7573478

A microcontroller with 96% power-conversion efficiency using stacked voltage domains. / Blutman, K.; Kapoor, A.; Majumdar, A. et al.

2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii. Institute of Electrical and Electronics Engineers, 2016. blz. 1-2 7573478.

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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AU - Kapoor, A.

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AU - Martinez, J.G.

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AU - Sevat, L.

AU - Van Der Wel, A.

AU - Fatemi, H.

AU - Pineda de Gyvez, J.

AU - Makinwa, K.

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AB - This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

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A microcontroller with 96% power-conversion efficiency using stacked voltage domains

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