A generic, scalable and globally arbitrated memory tree for shared DRAM access in real-time systems

M. Dev Gomony, J. Garside, B. Akesson, N. Audsley, K.G.W. Goossens

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

13 Citaten (Scopus)

Samenvatting

Predictable arbitration policies, such as Time Division Multiplexing (TDM) and Round-Robin (RR), are used to provide firm real-time guarantees to clients sharing a single memory resource (DRAM) between the multiple memory clients in multi-core real-time systems. Traditional centralized implementations of predictable arbitration policies in a shared memory bus or interconnect are not scalable in terms of the number of clients. On the other hand, existing distributed memory interconnects are either globally arbitrated, which do not offer diverse service according to the heterogeneous client requirements, or locally arbitrated, which suffers from larger area, power and latency overhead. Moreover, selecting the right arbitration policy according to the diverse and dynamic client requirements in reusable platforms requires a generic re-configurable architecture supporting different arbitration policies. The main contributions in this paper are: (1) We propose a novel generic, scalable and globally arbitrated memory tree (GSMT) architecture for distributed implementation of several predictable arbitration policies. (2) We present an RTL-level implementation of Accounting and Priority assignment (APA) logic of GSMT that can be configured with five different arbitration policies typically used for shared memory access in real-time systems. (3) We compare the performance of GSMT with different centralized implementations by synthesizing the designs in a 40 nm process. Our experiments show that with 64 clients GSMT can run up to four times faster than traditional architectures and have over 51% and 37% reduction in area and power consumption, respectively.

Originele taal-2Engels
TitelProceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's193-198
Aantal pagina's6
ISBN van elektronische versie978-3-9815-3705-5
DOI's
StatusGepubliceerd - 22 apr. 2015
Evenement18th Design, Automation and Test in Europe Conference and Exhibition (DATE 2015) - Alpexpo Congress Centre, Grenoble, Frankrijk
Duur: 9 mrt. 201513 mrt. 2015
Congresnummer: 18
https://www.date-conference.com/date15/

Congres

Congres18th Design, Automation and Test in Europe Conference and Exhibition (DATE 2015)
Verkorte titelDATE 2015
Land/RegioFrankrijk
StadGrenoble
Periode9/03/1513/03/15
AnderDesign, Automation and Test in Europe Conference and Exhibition ; 18 (Grenoble) : 2015.03.09-13
Internet adres

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