A general analysis on the timing jitter in D/A converters

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21 Citaten (Scopus)

Samenvatting

A general analysis on stochastic timing errors (clock or timing jitter) is presented for Digital to Analog Converters (DACs). The obtained results describe the effects of (non)correlated errors for given signal properties, and reveal the nature of the tradeoff between oversampling ratio, resolution and noise shaping in the context of noise-shaped DACs and Continuous-Time (CT) Sigma Delta (EA) ADCs. The importance of timing jitter for wideband DAC performance is exemplified with theory and simulations.
Originele taal-2Engels
TitelIEEE International Symposium on Circuits and systems (ISCAS)
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's117-120
Volume1
ISBN van geprinte versie0-7803-7448-7
DOI's
StatusGepubliceerd - 2002

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