A clustering technique for fast electrothermal analysis of on-chip power distribution networks

A. Magnani; M. de Magistris; A. Maffucci; A. Todri-Sanial

doi:10.1109/SaPIW.2016.7496292

A clustering technique for fast electrothermal analysis of on-chip power distribution networks

A. Magnani
, M. de Magistris
, A. Maffucci
, A. Todri-Sanial

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

Samenvatting

This paper presents an equivalent self-consistent electrothermal circuit model for power integrity analysis of large on-chip power distribution networks. Two coupled circuits are used to co-simulate the electrical and thermal behavior of the power grid. After a steady-state analysis, the order of the circuit is strongly reduced by means of a node clustering technique. The obtained low-order circuit allows a cost-effective complete power integrity analysis, including dynamic analysis and evaluation of time-domain features like voltage droop. As a case-study, a 45-nm chip power grid is analyzed: the full circuit for the electrothermal model with 4 million nodes is reduced by a factor of about 3500×, with a relative error on the solution below few percent.

Originele taal-2	Engels
Titel	2016 IEEE 20th Workshop on Signal and Power Integrity, SPI 2016 - Proceedings
Uitgeverij	Institute of Electrical and Electronics Engineers
Aantal pagina's	4
ISBN van elektronische versie	9781509003495
DOI's	https://doi.org/10.1109/SaPIW.2016.7496292
Status	Gepubliceerd - 20 jun. 2016
Extern gepubliceerd	Ja
Evenement	20th IEEE Workshop on Signal and Power Integrity, SPI 2016 - Turin, Italië Duur: 8 mei 2016 → 11 mei 2016

Congres

Congres	20th IEEE Workshop on Signal and Power Integrity, SPI 2016
Land/Regio	Italië
Stad	Turin
Periode	8/05/16 → 11/05/16

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Publisher Copyright:
© 2016 IEEE.

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10.1109/SaPIW.2016.7496292

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@inproceedings{5c86d8d126ea4142a87e6324140ba633,

title = "A clustering technique for fast electrothermal analysis of on-chip power distribution networks",

abstract = "This paper presents an equivalent self-consistent electrothermal circuit model for power integrity analysis of large on-chip power distribution networks. Two coupled circuits are used to co-simulate the electrical and thermal behavior of the power grid. After a steady-state analysis, the order of the circuit is strongly reduced by means of a node clustering technique. The obtained low-order circuit allows a cost-effective complete power integrity analysis, including dynamic analysis and evaluation of time-domain features like voltage droop. As a case-study, a 45-nm chip power grid is analyzed: the full circuit for the electrothermal model with 4 million nodes is reduced by a factor of about 3500×, with a relative error on the solution below few percent.",

keywords = "electrothermal analysis, IR-drop, model order reduction, On-chip power distribution networks, power integrity",

author = "A. Magnani and \{de Magistris\}, M. and A. Maffucci and A. Todri-Sanial",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 20th IEEE Workshop on Signal and Power Integrity, SPI 2016 ; Conference date: 08-05-2016 Through 11-05-2016",

year = "2016",

month = jun,

day = "20",

doi = "10.1109/SaPIW.2016.7496292",

language = "English",

booktitle = "2016 IEEE 20th Workshop on Signal and Power Integrity, SPI 2016 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Magnani, A, de Magistris, M, Maffucci, A & Todri-Sanial, A 2016, A clustering technique for fast electrothermal analysis of on-chip power distribution networks. in 2016 IEEE 20th Workshop on Signal and Power Integrity, SPI 2016 - Proceedings., 7496292, Institute of Electrical and Electronics Engineers, 20th IEEE Workshop on Signal and Power Integrity, SPI 2016, Turin, Italië, 8/05/16. https://doi.org/10.1109/SaPIW.2016.7496292

A clustering technique for fast electrothermal analysis of on-chip power distribution networks. / Magnani, A.; de Magistris, M.; Maffucci, A. et al.
2016 IEEE 20th Workshop on Signal and Power Integrity, SPI 2016 - Proceedings. Institute of Electrical and Electronics Engineers, 2016. 7496292.

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

TY - GEN

T1 - A clustering technique for fast electrothermal analysis of on-chip power distribution networks

AU - Magnani, A.

AU - de Magistris, M.

AU - Maffucci, A.

AU - Todri-Sanial, A.

PY - 2016/6/20

Y1 - 2016/6/20

N2 - This paper presents an equivalent self-consistent electrothermal circuit model for power integrity analysis of large on-chip power distribution networks. Two coupled circuits are used to co-simulate the electrical and thermal behavior of the power grid. After a steady-state analysis, the order of the circuit is strongly reduced by means of a node clustering technique. The obtained low-order circuit allows a cost-effective complete power integrity analysis, including dynamic analysis and evaluation of time-domain features like voltage droop. As a case-study, a 45-nm chip power grid is analyzed: the full circuit for the electrothermal model with 4 million nodes is reduced by a factor of about 3500×, with a relative error on the solution below few percent.

AB - This paper presents an equivalent self-consistent electrothermal circuit model for power integrity analysis of large on-chip power distribution networks. Two coupled circuits are used to co-simulate the electrical and thermal behavior of the power grid. After a steady-state analysis, the order of the circuit is strongly reduced by means of a node clustering technique. The obtained low-order circuit allows a cost-effective complete power integrity analysis, including dynamic analysis and evaluation of time-domain features like voltage droop. As a case-study, a 45-nm chip power grid is analyzed: the full circuit for the electrothermal model with 4 million nodes is reduced by a factor of about 3500×, with a relative error on the solution below few percent.

KW - electrothermal analysis

KW - IR-drop

KW - model order reduction

KW - On-chip power distribution networks

KW - power integrity

UR - https://www.scopus.com/pages/publications/84980417592

U2 - 10.1109/SaPIW.2016.7496292

DO - 10.1109/SaPIW.2016.7496292

M3 - Conference contribution

AN - SCOPUS:84980417592

BT - 2016 IEEE 20th Workshop on Signal and Power Integrity, SPI 2016 - Proceedings

PB - Institute of Electrical and Electronics Engineers

T2 - 20th IEEE Workshop on Signal and Power Integrity, SPI 2016

Y2 - 8 May 2016 through 11 May 2016

ER -

A clustering technique for fast electrothermal analysis of on-chip power distribution networks

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