A 60 GHz phased array system analysis and Its phase shifter in a 40 nm CMOS technology

Hao Gao (Corresponding author), Kuangyuan Ying, Peter Baltus

Onderzoeksoutput: Bijdrage aan tijdschriftTijdschriftartikelAcademicpeer review

Uittreksel

A 60 GHz phased array system for mm-wave frequency in 5 G is introduced and a 5 bit digitally controlled phase shifter in 40 nm CMOS technology is presented. In a phased array system,the signal to noise ratio(SNR)of the receiver is improved with the beaming forming function. Therefore,the communication data rate and distance are improved accordingly. The phase shifter is the key component for achieving the beam forming function,and its resolution and power consumption are also very critical. In the second half of this paper,an analysis of phase shifter is introduced,and a 60 GHz 5 bit digitally controlled phase shifter in 40 nm complementary metal oxide semiconductor(CMOS)technology is presented. In this presented phase shifter,a hybrid structure is implemented for its advantage on lower phase deviation while keeping comparable loss. Meanwhile,this digitally controlled phase shifter is much more compact than other works. For all 32 states,the minimum phase error is 1.5°,and the maximum phase error is 6.8°. The measured insertion loss is-20.9±1 d B including pad loss at 60 GHz and the return loss is more than 10 d B over 57—64 GHz. The total chip size is 0.24 mm2 with 0 m W DC power consumption.

Originele taal-2Engels
Pagina's (van-tot)566-578
Aantal pagina's13
TijdschriftTransactions of Nanjing University of Aeronautics and Astronautics
Volume36
Nummer van het tijdschrift4
DOI's
StatusGepubliceerd - 1 aug 2019

Vingerafdruk

Phase shifters
systems analysis
phased arrays
CMOS
phase error
Systems analysis
Metals
phase deviation
hybrid structures
beamforming
insertion loss
Electric power utilization
signal to noise ratios
receivers
direct current
communication
chips
signal-to-noise ratio
Insertion losses
Oxide semiconductors

Citeer dit

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abstract = "A 60 GHz phased array system for mm-wave frequency in 5 G is introduced and a 5 bit digitally controlled phase shifter in 40 nm CMOS technology is presented. In a phased array system,the signal to noise ratio(SNR)of the receiver is improved with the beaming forming function. Therefore,the communication data rate and distance are improved accordingly. The phase shifter is the key component for achieving the beam forming function,and its resolution and power consumption are also very critical. In the second half of this paper,an analysis of phase shifter is introduced,and a 60 GHz 5 bit digitally controlled phase shifter in 40 nm complementary metal oxide semiconductor(CMOS)technology is presented. In this presented phase shifter,a hybrid structure is implemented for its advantage on lower phase deviation while keeping comparable loss. Meanwhile,this digitally controlled phase shifter is much more compact than other works. For all 32 states,the minimum phase error is 1.5°,and the maximum phase error is 6.8°. The measured insertion loss is-20.9±1 d B including pad loss at 60 GHz and the return loss is more than 10 d B over 57—64 GHz. The total chip size is 0.24 mm2 with 0 m W DC power consumption.",
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A 60 GHz phased array system analysis and Its phase shifter in a 40 nm CMOS technology. / Gao, Hao (Corresponding author); Ying, Kuangyuan; Baltus, Peter.

In: Transactions of Nanjing University of Aeronautics and Astronautics, Vol. 36, Nr. 4, 01.08.2019, blz. 566-578.

Onderzoeksoutput: Bijdrage aan tijdschriftTijdschriftartikelAcademicpeer review

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