A 60-GHz double-balanced homodyne down-converter in 65-nm CMOS process

P. Sakian Dezfuli, R. Mahmoudi, Paul van Zeijl, M. Lont, A.H.M. Roermund, van

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

10 Citaten (Scopus)
1 Downloads (Pure)

Samenvatting

A fully differential 60 GHz down-converter in 65-nm CMOS technology is presented. The circuit, including the buffers, draws 5 mA from a 1.2 V supply. The measured power conversion gain is 4 dB with an IF 3 dB bandwidth of 1.3 GHz. Measured IIP2 and IIP3 are 16.6 and -6 dBm respectively. The mixer will be part of a 60 GHz receiver.
Originele taal-2Engels
TitelMicrowave Integrated Circuits conference, 2009. EuMIC 2009. European, September 28-29-2009
Pagina's258-281
StatusGepubliceerd - 2009
Evenementconference; IEEE EuMIC 2009, September 28-29 2009 -
Duur: 1 jan 2009 → …

Congres

Congresconference; IEEE EuMIC 2009, September 28-29 2009
Periode1/01/09 → …
AnderIEEE EuMIC 2009, September 28-29 2009

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  • Citeer dit

    Sakian Dezfuli, P., Mahmoudi, R., van Zeijl, P., Lont, M., & Roermund, van, A. H. M. (2009). A 60-GHz double-balanced homodyne down-converter in 65-nm CMOS process. In Microwave Integrated Circuits conference, 2009. EuMIC 2009. European, September 28-29-2009 (blz. 258-281)