A 3.72μW ultra-low power digital baseband for wake-up radios

Y. Zhang; Sijie Chen; N.F. Kiyani; G. Dolmans; J. Huisken; B. Büsze; P.J.A. Harpe; N.P. Meijs, van der; H.W.H. Groot, de

doi:10.1109/VDAT.2011.5783586

A 3.72μW ultra-low power digital baseband for wake-up radios

Y. Zhang
, Sijie Chen
, N.F. Kiyani
, G. Dolmans
, J. Huisken
, B. Büsze
, P.J.A. Harpe
, N.P. Meijs, van der
, H.W.H. Groot, de

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

16 Citaten (Scopus)

2 Downloads (Pure)

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In order to minimize power consumption without sacrificing much latency performance, wake-up radios are employed to assist the main radio for low power channel monitoring. This paper presents the design and implementation of an ultra-low power digital baseband (DBB) circuit for a wake-up radio. In a 90nm CMOS process, the circuit running at a 800kHz clock consumes 3.72µW with a standard 1.2V supply voltage, and achieves very good packet detection performance. The circuit is fully functional at 0.6V supply consuming 0.9µW.

Originele taal-2	Engels
Titel	Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan
Plaats van productie	Piscataway
Uitgeverij	Institute of Electrical and Electronics Engineers
Pagina's	1-4
ISBN van geprinte versie	978-1-4244-8500-0
DOI's	https://doi.org/10.1109/VDAT.2011.5783586
Status	Gepubliceerd - 1 apr 2011

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Zhang, Y., Chen, S., Kiyani, N. F., Dolmans, G., Huisken, J., Büsze, B., Harpe, P. J. A., Meijs, van der, N. P., & Groot, de, H. W. H. (2011). A 3.72μW ultra-low power digital baseband for wake-up radios. In Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan (blz. 1-4). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/VDAT.2011.5783586

@inproceedings{cd08a193177a4b72bd7f361e5d58d799,

title = "A 3.72μW ultra-low power digital baseband for wake-up radios",

abstract = "In order to minimize power consumption without sacrificing much latency performance, wake-up radios are employed to assist the main radio for low power channel monitoring. This paper presents the design and implementation of an ultra-low power digital baseband (DBB) circuit for a wake-up radio. In a 90nm CMOS process, the circuit running at a 800kHz clock consumes 3.72µW with a standard 1.2V supply voltage, and achieves very good packet detection performance. The circuit is fully functional at 0.6V supply consuming 0.9µW.",

author = "Y. Zhang and Sijie Chen and N.F. Kiyani and G. Dolmans and J. Huisken and B. B{\"u}sze and P.J.A. Harpe and \{Meijs, van der\}, N.P. and \{Groot, de\}, H.W.H.",

year = "2011",

month = apr,

day = "1",

doi = "10.1109/VDAT.2011.5783586",

language = "English",

isbn = "978-1-4244-8500-0",

pages = "1--4",

booktitle = "Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Zhang, Y, Chen, S, Kiyani, NF, Dolmans, G, Huisken, J, Büsze, B, Harpe, PJA, Meijs, van der, NP & Groot, de, HWH 2011, A 3.72μW ultra-low power digital baseband for wake-up radios. in Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan. Institute of Electrical and Electronics Engineers, Piscataway, blz. 1-4. https://doi.org/10.1109/VDAT.2011.5783586

A 3.72μW ultra-low power digital baseband for wake-up radios. / Zhang, Y.; Chen, Sijie; Kiyani, N.F. et al.
Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan. Piscataway: Institute of Electrical and Electronics Engineers, 2011. blz. 1-4.

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/Congresprocedure › Conferentiebijdrage › Academic › peer review

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AU - Dolmans, G.

AU - Huisken, J.

AU - Büsze, B.

AU - Harpe, P.J.A.

AU - Meijs, van der, N.P.

AU - Groot, de, H.W.H.

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N2 - In order to minimize power consumption without sacrificing much latency performance, wake-up radios are employed to assist the main radio for low power channel monitoring. This paper presents the design and implementation of an ultra-low power digital baseband (DBB) circuit for a wake-up radio. In a 90nm CMOS process, the circuit running at a 800kHz clock consumes 3.72µW with a standard 1.2V supply voltage, and achieves very good packet detection performance. The circuit is fully functional at 0.6V supply consuming 0.9µW.

AB - In order to minimize power consumption without sacrificing much latency performance, wake-up radios are employed to assist the main radio for low power channel monitoring. This paper presents the design and implementation of an ultra-low power digital baseband (DBB) circuit for a wake-up radio. In a 90nm CMOS process, the circuit running at a 800kHz clock consumes 3.72µW with a standard 1.2V supply voltage, and achieves very good packet detection performance. The circuit is fully functional at 0.6V supply consuming 0.9µW.

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Zhang Y, Chen S, Kiyani NF, Dolmans G, Huisken J, Büsze B et al. A 3.72μW ultra-low power digital baseband for wake-up radios. In Proceedings of the 2011 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 25-28 April 2011, Hsinchu, Taiwan. Piscataway: Institute of Electrical and Electronics Engineers. 2011. blz. 1-4 doi: 10.1109/VDAT.2011.5783586

A 3.72μW ultra-low power digital baseband for wake-up radios

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